Arithmetic logic unit

An arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and bitwise logical operations on binary data under processor control. Its operation and operands are selected by control signals.

Opcode: An opcode is the part of a machine instruction that specifies the operation to perform. The opcode helps determine which ALU operation the processor requests.
Boolean algebra: Boolean algebra is a mathematical system for operations on truth values, including conjunction, disjunction, and negation. Bitwise ALU operations implement Boolean functions independently across word bits.
Central processing unit: A central processing unit is the processor component that executes program instructions and coordinates system operations. The ALU is a core execution component within a CPU.
Floating-point unit: A floating-point unit is processor circuitry specialized for arithmetic on floating-point numbers. It handles floating-point formats and operations that a basic integer ALU may not provide.
Carry-lookahead adder: A carry-lookahead adder computes carry signals using generate and propagate logic to reduce addition delay. Its faster carry computation can improve the timing of an ALU's addition path.
Adder: An adder is a digital circuit that computes the sum of binary numbers. An ALU commonly uses an adder for addition and related arithmetic.
Logic gate: A logic gate is an electronic circuit that implements a Boolean operation on binary inputs. Combinations of gates form the logical and arithmetic paths inside an ALU.
Instruction set architecture: An instruction set architecture defines a processor's machine instructions, registers, and programmer-visible behavior. Its instruction set determines which operations an ALU must support.
Control unit: A control unit directs processor operations by issuing control signals and coordinating instruction execution. It selects and sequences work; the ALU performs the requested computation.
Ripple-carry adder: A ripple-carry adder passes each bit's carry to the next bit in sequence. Its simple layout trades area for a delay that grows with operand width.

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