IBM POWER architecture

IBM’s RISC processor architecture is implemented in POWER processors and defined by the Power ISA. It has evolved across server, supercomputer, and embedded systems.

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Power ISA: The instruction-set architecture defining instructions, registers, and operating modes for Power processors. It is the formal specification that defines the architecture.
IBM 801: An experimental IBM RISC computer project begun in the 1970s. Its simplified instruction-set ideas influenced POWER’s design.
IBM Power Systems: IBM’s family of enterprise servers built around POWER processors. These systems are the architecture’s principal commercial platform.
x86-64: The 64-bit extension of the x86 instruction-set architecture used in many personal computers and servers. It is POWER’s most common competing server architecture.
POWER processor: A family of IBM microprocessors implementing the POWER architecture for computing systems. These processors are the hardware implementations of the architecture.
IBM RT PC: An IBM workstation introduced in 1986, based on the ROMP processor derived from the 801 project. It was an early commercial expression of IBM’s RISC research.
IBM z/Architecture: IBM’s mainframe instruction-set architecture, distinct from the POWER architecture. It serves overlapping enterprise workloads through a separate architecture.
Arm architecture family: A family of processor architectures based on the Arm instruction-set architecture. Arm is another major RISC alternative across servers and embedded systems.
Out-of-order execution: A processor technique that executes instructions as resources become available, while preserving program-visible results. POWER implementations use it to exploit instruction-level parallelism.
POWER1: IBM’s first POWER processor, introduced in the early 1990s for high-performance workstations and servers. It marked the architecture’s first major commercial processor generation.