Memory-mapped I/O

Memory-mapped I/O exposes device registers or data at addresses in a processor’s memory space, letting software access them with ordinary load and store instructions.

Memory-mapped register: A hardware control or status register accessible at an address in a processor’s memory space. These registers are the addresses software reads and writes to control a device.
Physical address: An address used to identify a location in physical memory or an addressable device space. Device registers often occupy physical address ranges that the system maps for software access.
Memory-mapped graphics: Graphics hardware access through mapped registers or framebuffer addresses. A framebuffer can expose pixels as addressable data, while registers configure rendering.
Port-mapped I/O: An I/O scheme that uses a separate address space and dedicated instructions to access device ports. Unlike memory-mapped I/O, it keeps device addresses outside the ordinary memory address space.
Address decoding: Hardware logic that selects a device or memory location based on an address. It routes accesses in the mapped range to the intended device rather than ordinary memory.
Virtual address space: The set of virtual addresses a process can use, translated by hardware and software to physical locations. Applications usually reach mapped device regions through virtual addresses.
Framebuffer: A memory region containing pixel values used to produce a displayed image. When mapped, software can update display pixels by writing to addresses.
Programmed I/O: Data transfer in which the processor actively reads or writes device data. It describes processor-managed transfer, which can use either memory-mapped or port-mapped access.
Memory barrier: An instruction or synchronization operation that constrains the order of memory accesses. Barriers help preserve required ordering between device-register accesses and other operations.
Memory management unit: Hardware that translates virtual addresses and enforces access permissions. It can map a device’s physical range into a process or kernel address space.

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