MIPS architecture

MIPS is a family of reduced instruction set computer (RISC) architectures developed by MIPS Computer Systems. Its instruction sets use a load/store model, in which arithmetic operates on registers and memory is accessed through explicit load and store instructions.

Reduced instruction set computer: A processor design approach that uses a comparatively small set of simple instructions. MIPS is a prominent architecture family built around this design approach.
MIPS pipeline: A staged processor implementation that executes MIPS instructions through overlapping phases. Classic MIPS implementations used a five-stage pipeline to process instructions efficiently.
MIPS Computer Systems: The company that developed and commercialized the MIPS architecture and its early processors. The architecture originated as the company’s implementation of RISC design ideas.
R3000: A 32-bit MIPS microprocessor used in workstations, embedded systems, and the original PlayStation. It shows how early MIPS designs served both general computing and consumer electronics.
ARM architecture: A family of RISC instruction set architectures widely used in mobile devices and embedded systems. ARM became a major alternative to MIPS in markets where power efficiency and licensing mattered.
Load/store architecture: An instruction-set design in which arithmetic uses registers and separate instructions transfer data to or from memory. MIPS arithmetic instructions operate on registers rather than directly on memory.
Branch delay slot: An instruction position after a branch that executes before control transfers in architectures with delayed branching. Early MIPS exposed a pipeline consequence by defining the instruction after a branch to execute.
John L. Hennessy: A computer scientist who helped develop RISC and founded MIPS Computer Systems. His Stanford research and company leadership shaped the architecture’s early direction.
R4000: A MIPS microprocessor that introduced a 64-bit implementation of the architecture. Its workstation and server use marked MIPS’s move into 64-bit computing.
SPARC: A RISC instruction set architecture developed by Sun Microsystems and standardized for multiple implementations. SPARC offers a parallel commercial RISC lineage with different register and ecosystem choices.

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