Reduced instruction set computer

A processor design approach built around a relatively small set of simple instructions, often designed to execute quickly and predictably. Its name contrasts with complex instruction set computer designs.

Instruction set architecture: The programmer-visible specification of a processor, including its instructions, registers, and memory model. RISC is an approach to designing this interface and its instruction set.
Complex instruction set computer: A processor design approach with instructions that can perform more elaborate operations, sometimes in fewer instructions. CISC is the historical counterpart named in contrast to RISC.
IBM 801: An experimental IBM processor project begun in the 1970s that helped develop reduced-instruction-set design ideas. The 801 was an early project that made a small, fast instruction set a concrete design goal.
ARM architecture family: A family of processor architectures developed by Arm and widely used in mobile and embedded devices. ARM became a major commercial architecture rooted in reduced-instruction-set design.
Reduced instruction set computer commercialization: The adoption of RISC architectures in commercial workstations, servers, and embedded processors. Commercial systems tested whether research-era RISC advantages could matter in production.
Load-store architecture: An architecture in which only load and store instructions access memory; arithmetic operates on registers. This common RISC organization keeps memory access distinct from computation.
Microcode: Low-level control instructions used inside some processors to implement machine instructions. Microcode can translate complex instructions into simpler internal operations.
Berkeley RISC: A series of processor research projects at the University of California, Berkeley, beginning in the early 1980s. Berkeley's prototypes helped establish RISC as a named architecture research program.
RISC-V: An open standard instruction set architecture based on reduced-instruction-set principles. RISC-V makes the RISC instruction set available as an openly specified standard.
Acorn Computers: A British computer company whose processor project led to the ARM architecture. Acorn's need for an efficient processor helped bring RISC design into a lasting product line.

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