Clock signal

A periodic waveform that coordinates digital-circuit operations by marking timing intervals. Its transitions provide shared timing references for sequential logic and other synchronized components.

Clock edge: A transition in a clock waveform, usually from low to high or high to low. Sequential circuits commonly use one chosen transition to trigger state updates.
Oscillator: A system that generates a repeating signal from a physical or electronic process. An oscillator is a common source of the periodic waveform used as a circuit clock.
Clock gating: A power-saving technique that stops clock transitions from reaching inactive circuit regions. Suppressing unnecessary clock activity reduces dynamic power in digital circuits.
Single-phase clock: A timing scheme that uses one clock waveform to coordinate circuit state changes. It is the simplest common arrangement for clocked digital logic.
Flip-flop: A bistable circuit that stores one bit and changes state in response to a control event. Clocked flip-flops capture data at designated clock edges.
Crystal oscillator: An electronic oscillator whose frequency is stabilized by a vibrating quartz crystal. Quartz oscillators provide stable reference clocks in many digital systems.
Dynamic frequency scaling: Changing a processor’s operating frequency in response to workload or power conditions. Changing clock frequency trades performance against energy use and heat.
Two-phase clock: A timing scheme that uses two nonoverlapping clock phases to control circuit elements. Its separate phases contrast with designs driven by a single clock waveform.
Setup time: The minimum time input data must remain stable before a clock-triggered sampling event. Data arriving too late before an edge can make a flip-flop capture incorrectly.
Clock tree: The network that distributes a clock signal to sequential elements across an integrated circuit. Its buffers and routes deliver the clock while controlling skew and signal quality.

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