CMOS

CMOS is a semiconductor technology that uses complementary p-type and n-type field-effect transistors. Its paired switching behavior enables low static power consumption in digital logic.

MOSFET: A field-effect transistor that controls current through a channel using an electric field. CMOS circuits pair p-channel and n-channel MOSFETs to implement complementary switching.
NMOS logic: A logic family that uses n-channel MOSFETs as its principal switching devices. Unlike CMOS, NMOS logic typically needs a continuously conducting load and draws static power.
Microprocessor: A programmable processor implemented as an integrated circuit. Modern microprocessors rely on dense CMOS logic for computation and control.
Bipolar junction transistor: A transistor in which current through a semiconductor junction controls current between two other terminals. Bipolar circuits can offer speed or drive advantages, but generally require more static power than CMOS logic.
Moore's law: The historical observation that transistor counts on integrated circuits grew exponentially over successive generations. CMOS scaling enabled much of the long-term growth in transistor counts.
CMOS inverter: A logic gate that uses one p-channel and one n-channel MOSFET to invert an input signal. Its pull-up and pull-down paths show how complementary devices switch without a direct supply-to-ground path.
PMOS logic: A logic family built primarily from p-channel MOSFETs. PMOS provides the complementary device type that CMOS pairs with NMOS.
Static random-access memory: A volatile memory that stores each bit in a bistable circuit, commonly built from six transistors. Its standard bit cell uses CMOS inverters and access transistors.
Bipolar CMOS: An integrated-circuit technology combining bipolar transistors with CMOS devices. BiCMOS adds bipolar performance to CMOS integration at greater process complexity.
Dennard scaling: A scaling principle predicting that shrinking transistors could preserve electric-field strength while improving speed and power density. Its breakdown helped end the expectation that smaller CMOS devices would automatically use less power per area.

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