Static random-access memory

Static random-access memory (SRAM) stores each bit in a bistable circuit and retains its data without refresh while power is supplied. It is fast and typically uses more chip area per bit than dynamic random-access memory.

SRAM cell: A circuit that stores one SRAM bit, commonly built from six transistors. Its cross-coupled inverters hold a stable state while access transistors connect it to bit lines.
MOSFET: A field-effect transistor that controls current through a channel using an electric field. MOSFETs form the switching and feedback devices in standard SRAM cells.
CPU cache: Small, fast memory that stores data and instructions near a processor core. SRAM commonly implements processor caches because low access latency matters.
Dynamic random-access memory: Semiconductor memory that stores bits as charge in capacitors and periodically refreshes them. DRAM offers greater density, while SRAM avoids refresh and is typically faster.
Bistability: The property of a system having two stable states under the same external conditions. An SRAM cell represents zero and one with its two stable circuit states.
CMOS: A semiconductor technology using complementary pairs of p-type and n-type MOSFETs. CMOS inverters make SRAM storage circuits practical with low static power.
Register file: A processor storage structure providing fast access to a set of registers. SRAM-like arrays can supply the high-throughput storage needed inside processor cores.
Read-only memory: Nonvolatile memory designed primarily for reading fixed or infrequently changed data. ROM preserves information without power, unlike SRAM’s power-dependent storage.
Cross-coupled inverter: A pair of inverters connected so each output drives the other’s input. The pair provides the positive feedback that preserves an SRAM bit.
Memory cell: A circuit or device that stores one or more units of digital information. An SRAM bit cell is one implementation of this general storage unit.

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