Linked from

The 34 pages that link to Instruction set architecture, each with the reason it gives.

• Machine codeNarrower topic: It defines which machine-code instructions a compatible processor can execute.

• IntelNarrower topic: Intel’s processor designs implement an architecture that software can target.

• Assembly languageNarrower topic: An assembly language expresses the operations defined by a particular processor architecture.

• Reduced instruction set computerNarrower topic: RISC is an approach to designing this interface and its instruction set.

• RISC-VNarrower topic: RISC-V specifies the software-visible contract implemented by compatible processors.

• x86Narrower topic: x86 is one long-lived family of these software-visible specifications.

• Instruction cycleNarrower topic: It defines what instructions the cycle must interpret and support.

• Program counterNarrower topic: An architecture defines the program counter's visible behavior and conventions.

• Calling conventionNarrower topic: The available registers and instructions constrain each platform’s calling conventions.

• ExecutableNarrower topic: An executable's machine code must match the processor's instruction set.

• Processor registerNarrower topic: It defines which registers software can name and how instructions may use them.

• Sophie WilsonNarrower topic: ARM began as an instruction set Wilson helped design, distinct from its physical implementations.

• Object codeNarrower topic: Object code must use instructions supported by its target processor architecture.

• Multi-core processorNarrower topic: It defines the common programming interface that a processor’s cores implement.